EngineerZone Forum
Q&A from Analog Devices EngineerZone: SigmaDSP/SigmaStudio and DSP discussions (971 topics).
971 topics · 3273 messages
-
how to choose the sample rate of ADC?
I am using ADSP21489 Ez-board, the codec is AD1939. In the datasheet of AD1939, the sample rate of ADC can be set by the ADC Control0 Register with bit 6 and bit 7. When these two bits are set to 00,
-
C-code to DSP asm file conversion..
Any one can help me to convert C-code to VisualDSP++ assembly code coversion technique.. Regards, Murugesan.
-
Facing problem in Uart DMA receive buffer updating with new data
Dear Sir/mam, I'm facing one problem in achieving data transfer between two devices through UART interface, my device is designed based on ADSP21489 in this it is configured for UART transfer in DMA m
-
How does overlay PACKING works?
There is some documentation on the SHARC Linker user manual. Unfortunately the packing part is very obscure and I don't understand how it works. PACKING(12 B3 B4 B5 B6 B0\ B11 B12 B1 B2 B0\ B7 B8 B9 B
-
I am not able to find the Video Encoder and Decoder EI3 Extender Board Support Package 1.0.0. Please help.
I have installed the CCES 1.1.0 evaluation license version for ADSP BF609 EZ-KIT-1.0. I required the "Video Encoder and Decoder E13 extended board support package(BSP)" to use those encoder and decode
-
A beginner's question about LDF file
I am reading EE069 on learning ldf file for writing codes on ADSP21489 platform. However, I noticed that some projects in the examples of ADSP-21489 EZ-Board do not have ldf file, such as "21489 AD193
-
in bf609 how to access a variable by both the cores???
i have declared a variable in shared memory and i m trying to access the variable from both the cores. it gives error.. i should use MCAPI protocol???
-
SDRAM types suitable for Blackfin BF51x series DSP?
Hi, Since memory technology is developing very fast it is very hard to find and update product. I have some experience with Blackfin BF33x and now plan to migrate into newer BF51x series. There are tw
-
Broken links
There are a lot of broken links on this forum, I assume due to a freshening up of the analog.com web ecosystem. I guess it is appropriate to start a thread just to request some management of the dead
-
I2S Sport DMA interleaved Rx
I'm using a BF592 and using DMA to handle the Rx side of my I2S communication the only problem is the DMA triggers on the Left and Right frame sync so that the data is interleaved in my buffer as L-R-
-
Power estimation for BF52x Family
Hi, Can anyone point me towards the power estimation document/excel for ADSP-BF52x family. I found something for BF60x family and BF53x but not the one I am interested in. Regards Khaldoon
-
Processor, DSP or Microcontroller?
Hi, I am looking for best solution for the system I am trying to design. The system I am designing for should have: 1) At least one high-speed USB 2) SPORT (or I2S), minimum support for 8 stereo chann
-
ts201 cache and read operation
Hi, I use the Ts201 with the following configuration: - Internal block memory with its Cache enabled. Question: How can I ensure, that the read operation after the write operation (from different C fu
-
FFT in BF506
Hello all, I need help to compute (or define) the ADC sampling frequency. I am using CCES and BF506 EZ-kit to sample I and Q data and apply FFT. I am now testing the code I wrote by injecting a sin wa
-
Can't find EE-68
Hi, I tried 30 minutes to locate EE-68 on the new website. I couldn't find it. The new website is full of hyper-deadends, the best one is the "you can contact us any time". Please have that fixed as s
-
GPIOs in BF706
Hi, How to configure a port pin to function as a GPIO in BF706. Why there is no "defbf70x_base.h" as there is for other BF processors like "defbf52x_base.h" where the port masks are defined. what abou
-
ADSP-2101 code porting
If I have assembly code written for ADSP-2101, is it easier to translate it to SHARC or Blackfin? processors and dsp adsp-2101 ADSP-21xx Fixed-Point DSPs
-
BF592 not reaching main after SPORT interrupt
I am setting up SPORT0 Interrupts as such: void Init_Interrupts(void) { *pSIC_IMASK0 |= IRQ_DMA2 | IRQ_DMA1; *pSIC_IAR1 |= 0xfffff23f ; register_handler(ik_ivg9, SPORT0_Tx_ISR); register_handler(ik_iv
-
facing problem in implementation and interrupt handling in UART DMA in ADSP21489
Dear Sir, In my project, i have to work on RS422 interface for receiving input from external source to our unit My unit is design using ADSP21489, I'm using UART interface for receiving input from ext
-
bfrom_SpiBoot fails with failure mode depending on SPI clock speed
I'm writing a boot loader for an embedded system using a BF525 and a SST25VF016B flash memory. The boot loader loads from flash during a cold boot then checks to see if there is a valid application im
-
Hi frnds i need ur help.I would implement lms algorithm in audio signal now i need manual calculation of lms algorithm in defined signal any one help me..
I need lms theoretical calculation ofany defined signal..
-
Turning on LEDs on the ADSP-21364 EZ-KIT Lite development board in C language
Hi i'm new to programming SHARC DSPs and I have recently acquired an ADSP-21364 EZ-KIT Lite development board for my university project. I'm hoping to do some effects processing later on but for now I
-
Is ADSP-BF561 good for my project?
Hello, I am looking for someone to give me a right feedback about sing ADSP-BF561 for my project. I am trying to transfer a life time video wirelessly. Input is (5 Mbps) digital video comes from the F
-
ADSP-BF531, program for SPI FLASH booting
Hello, dear colleagues! Some times ago we use ADSP-BF531SBSTZ400 with SPI FLASH AT45DB081D-SU (by ATMEL). (Processor SPI Master Mode Boot via SPI Memory (BMODE = 11)) But now AT45DB081D-SU is obsolete
-
TS201 LVDS timing
Hello We are using the TS201-050 in our video card. The TS201 recieves/ sends its video information via its LVDS links towards a FPGA. The DSP receives a 108MHz SCLK, its core is running at CCLK of 4x