Can Analog Devices help with my processor EMC / EMI test results?

The answer is usually that we cannot help, but this post documents some thoughts on EMI.

It is difficult to give EMI / EMC advice to cover all applications. There are many sources of emissions in a typical system. We have learned a few

things studying emissions of our device when only the processor is isolated in a test chamber. Let’s start there and then move on to PCB and cable

design.

The internals of our processors radiate very little electromagnetic noise even when the software is written to maximize internal switching current.

When we find EMC problems we can sometimes use the frequency of emission to help locate the source.

The EMI is usually associated with output signals and therefore are related to SCLK. On the Blackfin processors, SDRAM CLKOUT can itself be a

big influence. We usually see the first, 3rd, 5th and 7th harmonics of CLKOUT. The SCLK*5 is often the largest spike. Although a square wave has

less energy in the high harmonics, they more efficiently match the small antenna size of conductive elements in a system.

Line termination with series resistors at the driver can reduce the higher harmonics. Ferrite beads are available as in small packages that can

replace series resistors where needed. Line termination on all SDRAM signals is good practice and will reduce EMI for both SHARC and Blackfin

devices.

For arbitrary software and data, the fundamental frequency of signals has a mix of SCLK for CLKOUT, SCLK/2 for address and data, SCLK/3,

SCLK/4 and so on.

VDDEXT and VDDMEM power circuits and bypass are critical. CLKOUT current consumption during both driver high and low transitions will cause

power spikes at twice the output frequency. This yields emission spikes that look to be the second harmonic (2x) of SCLK. It can also be the

frequency that is twice SCLK/2, SCLK/3 or SCLK/4 as mentioned above. These non-odd-harmonic frequencies are commonly seen on boards that

provide inadequate power and ground distribution. In one example, additional bypass reduced a big spike at SCLK*2.

A broad band of high frequency energy is caused by the pulse nature of power consumption. This may cause resonances at frequencies determined

by the parasitic inductance in bypass caps. It may also cause resonances at frequencies determined by the size of antenna-like conductive

features.

Printed circuit board layout can play a key role in emissions. A big issue is often ground paths.
In a ground plane, the return current should be able to follow the path directly underneath the signal. Therefore ground planes should not have a gap

underneath a signal path. Gaps change the transmission line impedance, cause reflections, and cause local ground variations (ground bounce).

Reduce the size of gaps caused by groups of vias in ground and power planes.

If a PCB trace has a 90 degree corner, the effective area is bigger and therefore the impedance changes. It is recommended to use either round or 2

45 degree PCB trace-corners.

Vias make a small change in impedance so limit the number of vias in a net.

Crystals can radiate more than Oscillators. Keep those PCB tracks as short as possible and closest to the pins of the processor. Use a ground

local to the crystal circuit and connected to other grounds in only one spot. This will reduce currents injected in the main ground plane.

The above has covered good PCB design but often emissions are caused by the packaging and system connections.

Any connections to other PCBs should be the first place to look. Cables of 8 inches (20 cm) or more can be very efficient antennas in the 200 to

500 MHz region. They almost always require some beads, mutual inductance or other edge reduction methods. Ferrite Beads in the power supply

of the DSP and the SDRAM section helps too, getting the higher harmonics down, and reduce the radiation of the power supply wires.

One approach to EMI repair at the product level is to wrap the entire thing in aluminum foil and measure it again. Then remove sections of the foil to

determine which section of the product is generating the most noise.

A final attempt to reduce EMI in some systems may be a spread spectrum oscillator. However, this is expensive, and requires very controlled design

of the spreading mechanism. In a processor like the Blackfin or SHARC, there is an internal PLL. If the frequency (or phase change) is slow

enough, the PLL can change the frequency as you desire. If the frequency change is too fast, then the PLL will act as a filter and output a fixed

frequency if you are lucky. At all times the minimum pulse width must be observed. Unfortunately, our devices are only tested and guaranteed

under fixed clock conditions. There may be performance issues that were not foreseen. Also spread spectrum may not be desirable in systems

that sample data.

The bottom line is that today’s processors run at very high speed. They have very fast edge transitions and fast power consumption spikes. Some

shielding should be expected.

Thanks to my fellow engineers for their contributions to this post. All comments are welcome.
_BobK

But my customer sees EMI at the core frequency.

I wanted to add some thoughts to the previous post after hearing of customers that see EMI spikes at the core frequency. There could be several reasons that they see much more noise than we did.

First the drive of CLKOUT must be disabled in software. A core to system ratio of 3, 5, or 7 would cause CLKOUT to have a big emission spike at CCLK.

Second, the bypass on our test fixture is strong. There is one cap for each pin or ball of the device. VDDINT bypass is a range of .1, .01 and .001uF caps near the device. The test fixture is made with several power layers and several ground layers placed next to each other to create additional bypass.

The third reason is the most interesting. Although not enabled during my core test, all EBIU pins are driven because BR# is held high. The test fixture has 47pF caps on each and every output. Because the EBIU pins are driven (high or low) these caps provide an additional highly distributed low inductance 2 or 3nF between the die in the chip and ground on the PCB.

That third reason is similar to a trick that I have heard off but never tried. If you have unused GPIO pins ground them. Then be very careful to only enable them as low (never high) outputs. I have heard that this reduces EMI. The downside is that runaway software could damage the hardware.

Is there another cause?

I have reviewed 2 different Blackfin schematics from 2 different customers that both complained about EMI at the core frequency. They both made the same small mistake. They did not connect VDDRTC and they did not connect RTXI to ground when not used. A coincidence? Maybe not. RTXI should always be connected to ground when not used. All supply voltages like VDDRTC should be driven as specified even if the peripheral is not used.

_BobK

This question has been closed by the EZ team and is assumed answered.